General

Authors

Search


Committee login



 
 

 


 

 

Forthcoming

Small thumbnail

Baidu SEO

Challenges and Intricacies of Marketing in China

Small thumbnail

Asymmetric Alliances and Information Systems

Issues and Prospects

Small thumbnail

Technicity vs Scientificity

Complementarities and Rivalries

Small thumbnail

Freshwater Fishes

250 Million Years of Evolutionary History

Small thumbnail

Biostatistics and Computer-based Analysis of Health Data using SAS

Biostatistics and Health Science Set

Small thumbnail

Predictive Control

Small thumbnail

Fundamentals of Advanced Mathematics 1

Categories, Algebraic Structures, Linear and Homological Algebra

Small thumbnail

Swelling Concrete in Dams and Hydraulic Structures

DSC 2017

Small thumbnail

The Chemostat

Mathematical Theory of Microorganims Cultures

Small thumbnail

Earthquake Occurrence

Short- and Long-term Models and their Validation

Small thumbnail

Plasma Etching Processes for CMOS Device Realization

Edited by Nicolas Posseme, CEA-LETI Laboratory, Grenoble, France

ISBN: 9781785480966

Publication Date: January 2017   Hardback   136 pp.

80 USD


Add to cart

eBooks


Ebook

Description

Plasma etching has long enabled the perpetuation of Moore's Law. Today, etch compensation helps to create devices that are smaller than 20 nm. But, with the constant downscaling in device dimensions and the emergence of complex 3D structures (like FinFet, Nanowire and stacked nanowire at longer term) and sub 20 nm devices, plasma etching requirements have become more and more stringent.
Now more than ever, plasma etch technology is used to push the limits of semiconductor device fabrication into the nanoelectronics age. This will require improvement in plasma technology (plasma sources, chamber design, etc.), new chemistries (etch gases, flows, interactions with substrates, etc.) as well as a compatibility with new patterning techniques such as multiple patterning, EUV lithography, Direct Self Assembly, ebeam lithography or nanoimprint lithography.
This book presents these etch challenges and associated solutions encountered throughout the years for transistor realization.

Contents

1. CMOS Devices Through the Years by Maud Vinet and Nicolas Posseme
2. Plasma Etching in Microelectronics by Maxime Darnon
3. Patterning Challenges in Microelectronics by Sébastien Barnola, Nicolas Posseme, Stefan Landis and Maxime Darnon
4. Plasma Etch Challenges for Gate Patterning by Maxime Darnon and Nicolas Posseme

About the Authors

Nicolas Posseme is a senior research scientist in micro and nanotechnology and deputy head of plasma etching & stripping in the silicon technologies division at the CEA-LETI Laboratory in Grenoble, France.

Downloads

DownloadTable of Contents - PDF File - 174 Kb

Related Titles



































0.01898 s.