General

Authors

Search


Committee login



 
 

 


 

 

Forthcoming

Small thumbnail

Nonlinear Theory of Elastic Plates

Small thumbnail

Exterior Algebras

Elementary Tribute to Grassmann's Ideas

Small thumbnail

From Pinch Methodology to Pinch-Exergy Integration of Flexible Systems

Thermodynamics Energy, Environment, Economy Set

Small thumbnail

Data Treatment in Environmental Sciences

Multivaried Approach

Small thumbnail

Gas Hydrates 1

Fundamentals, Characterization and Modeling

Small thumbnail

Smart Decisions in Complex Systems

Small thumbnail

Chi-squared Goodness-of-fit Tests for Censored Data

Stochastic Models in Survival Analysis and Reliability Set Volume 3

Small thumbnail

Baidu SEO

Challenges and Intricacies of Marketing in China

Small thumbnail

Supply Chain Management and Business Performance

The VASC Model

Small thumbnail

Asymmetric Alliances and Information Systems

Issues and Prospects

Small thumbnail

Plasma Etching Processes for Interconnect Realization in VLSI

Edited by Nicolas Posseme, CEA-LETI, Grenoble, France

ISBN: 9781785480157

Publication Date: April 2015   Hardback   122 pp.

75.00 USD


Add to cart

eBooks


Ebook

Description

This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions.
This book focuses on back end of line (BEOL) for high performance device realization and presents an overview of all etch challenges for interconnect realization as well as the current etch solutions proposed in the semiconductor industry.
The choice of copper/low-k interconnect architecture is one of the keys for integrated circuit performance, process manufacturability and scalability. Today, implementation of porous low-k material is mandatory in order to minimize signal propagation delay in interconnections. In this context, the traditional plasma process issues (plasma-induced damage, dimension and profile control, selectivity) and new emerging challenges (residue formation, dielectric wiggling) are critical points of research in order to control the reliability and reduce defects in interconnects.
These issues and potential solutions are illustrated by the authors through different process architectures available in the semiconductor industry (metallic or organic hard mask strategies).

Contents

1. Introduction, Nicolas Posseme and Maxime Darnon.
2. Interaction Plasma/Dielectric, Nicolas Posseme, Maxime Darnon, Thierry Chevolleau and Thibaut David.
3. Porous SiOCH Film Integration, Nicolas Posseme, Maxime Darnon, Thibaut David and Thierry Chevolleau
4. Interconnects for Tomorrow, Maxime Darnon and Nicolas Posseme.

About the Authors

Nicolas Posseme is a Research Scientist and Deputy Head of Plasma Etching & Stripping in the Silicon Technologies division at the CEA-LETI Laboratory in Grenoble, France.

Downloads

DownloadTable of Contents - PDF File - 137 Kb

Related Titles



































0.01986 s.